RT9055 ? ds9055-00 march 2012 www.richtek.com 1 copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ? 300ma dual ldo regulator ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. applications z cellular handsets z battery powered equipment z hand-held instruments z portable information appliances pin configurations (top view) general description the RT9055 is a dual channel, low noise, and low dropout regulator sourcing up to 300ma at each channel. the output voltage range is from 0.9v to 3.5v with an input voltage range from 1.5v to 5.5v. the RT9055 offers 2% accuracy, extremely low dropout voltage and extremely low quiescent current (only 29 a per ldo). the shutdown current is near zero which is suitable for battery powered applications. the RT9055 also provides protection functions such as current limiting, output short circuit protection, and over temperature protection. the RT9055 allows stable operation with very small ceramic output capacitors, hence minimizing required board space and component cost. the RT9055 is available in a wl-csp-6b 0.8x1.2 package. features z z z z z wide operating voltage range : 1.5v to 5.5v z z z z z low noise for rf application z z z z z no noise bypass capacitor required z z z z z fast response in line/load transient z z z z z ttl logic controlled shutdown input z z z z z low temperature coefficient z z z z z dual ldo outputs (300ma/300ma) z z z z z ultra-low quiescent current : 29 a/ldo z z z z z high output accuracy 2% z z z z z short current protection z z z z z thermal shutdown protection z z z z z current limit protection z z z z z short circuit thermal folded back protection z z z z z rohs compliant and halogen free wsc-csp-6b 0.8x1.2 available voltage version code voltage code voltage code voltage a 3.5 b 1.3 c 1.2 d 1.85 e 2.1 f 1.5 g 1.8 h 2 j 2.5 k 2.6 l 2.7 m 2.8 n 2.85 p 3 q 3.1 r 3.2 s 3.3 t 2.65 v 2.9 w 1.6 x 3.15 y 1.9 u 1.4 z 1.25 vin vout2 en2 en1 vout1 gnd b2 c2 c1 a1 a2 b1 RT9055- package type wsc : wl-csp-6b 0.8x1.2 output voltage : vout1/vout2 vout2 > vout1 is recommended marking information for marking information, contact our sales representative directly or through a richtek distributor located in your area.
RT9055 2 ds9055-00 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. functional pin description function block diagram typical application circuit RT9055 gnd vin v in 1f c in vout2 v out2 en1 en2 chip enable vout1 v out1 c out1 1f b2 a1 c1 b1 c2 a2 c out2 1f pin no. pin name pin function a1 en1 ldo1 enable (active high). a2 vout1 ldo1 output voltage. b1 gnd ground. b2 vin supply input. c1 en2 ldo2 enable (active high). c2 vout2 ldo2 output voltage. en1 current limit and thermal protection output driver + - vout1 shutdown and logic control vin v ref en2 current limit and thermal protection output driver + - vout2 shutdown and logic control v ref gnd 13a 13a
RT9055 3 ds9055-00 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. absolute maximum ratings (note 1) z supply input v oltage, vin ----------------------------------------------------------------------------------------------- ? 0.3v to 6v z other i/o pins voltages ------------------------------------------------------------------------------------------------- ? 0.3v to 6v z power dissipation, p d @ t a = 25 c wl-csp-6b 0.8x1.2 ------------------------------------------------------------------------------------------------------ 0.670w z package thermal resistance (note 2) wl-csp-6b 0.8x1.2, ja ------------------------------------------------------------------------------------------------ 148 c/w z lead temperature (soldering, 10 sec.) ------------------------------------------------------------------------------- 260 c z junction temperature ----------------------------------------------------------------------------------------------------- 150 c z storage temperature range -------------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body model) ---------------------------------------------------------------------------------------------- 2kv mm (ma chine model) ----------------------------------------------------------------------------------------------------- 200v recommended operating conditions (note 4) z supply input voltage, vin ----------------------------------------------------------------------------------------------- 1.5v to 5.5v z junction temperature range -------------------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range -------------------------------------------------------------------------------------------- ? 40 c to 85 c electrical characteristics (v in = v out + 1v, c in = c out = 1 f, t a = ? 40 c to 85 c, unless otherwise specified) parameter symbol test conditions min typ max unit input power supply v out = 1.2v to 1.4v, i out = 300ma 50 -- 550 v out = 1.5v to 2.4v, i out = 300ma 40 -- 400 dropout voltage (note 5) v drop v out = 2.5v to 3.5v, i out = 300ma 20 -- 300 mv output voltage range v out 0.9 -- 3.5 v v out accuracy v i out = 1ma to 300ma ? 2 -- 2 % line regulation v line v in = (v out + 1) to 5.5v, i out = 1ma ? 2 -- 2 % load regulation v load 1ma < i out < 300ma ? 1.5 -- 1.5 % current limit i lim r load = 0 350 600 -- ma quiescent current i q v en > 1.5v -- 58 -- a shutdown current i shdn v en < 0.4v -- -- 1 a logic-high v ih v in = 2.5v to 5.5v, power on 1.2 -- -- en input threshold vo l ta ge logic-low v il v in = 2.5v to 5.5v, shutdown -- -- 0.4 v v out discharge resistance in shutdown (note 6) v in = 5v, en1 = en2 = gnd -- 3 -- k en pull low current i en 8 13 18 a thermal shutdown t sd -- 170 -- c thermal shutdown hysteresis t sd -- 40 -- c
RT9055 4 ds9055-00 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. parameter symbol test conditions min typ max unit f = 100hz, v in = v out + 1v, c out = 2.2 f, i load = 50ma -- 70 -- f = 1khz, v in = v out + 1v, c out = 2.2 f, i load = 50ma -- 70 -- f = 10khz, v in = v out + 1v, c out = 2.2 f, i load = 50ma -- 70 -- f = 100khz, v in =v out + 1v, c out = 2.2 f, i load = 50ma -- 54 -- f = 200khz, v in = v out + 1v, c out = 2.2 f, i load = 50ma -- 45 -- power supply rejection ratio psrr f = 300khz, v in = v out + 1v, c out = 2.2 f, i load = 50ma -- 38 -- db output voltage noise c out1 = c out2 = 10 f, 10hz to100khz, i out1 = i out2 = 1ma -- 100 -- v rms note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ja is measured at t a = 25 c on a high effective thermal conductivity four-layer test board per jedec 51-7. the csp balls connect directly to the internal gnd copper plane by 2 vias, the via diameter is about 1mm. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions. note 5. the dropout voltage is defined as v in ? v out , which is measured when v out is v out(normal) ? 100mv. note 6. it is guaranteed by design.
RT9055 5 ds9055-00 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical operating characteristics quiescent current vs. temperature 0 10 20 30 40 50 60 70 80 -50 -25 0 25 50 75 100 125 temperature (c) quiescent current (a ) v in = 3.7v, no load output voltage vs. temperature 1.12 1.13 1.14 1.15 1.16 1.17 1.18 1.19 1.20 1.21 1.22 -50-250 255075100125 temperature (c) output voltage (v) v in = 3.7v, no load dropout voltage vs. load current 0 20 40 60 80 100 120 140 0 50 100 150 200 250 300 load current (ma) dropout voltage (mv) v out = 3.3v 125 c 25 c ? 40 c line transient response time (100 s/div) v in (2v/div) v in = 2.8v to 4.2v, i load = 1ma v out (20mv/div) line transient response time (100 s/div) v in (2v/div) v in = 2.8v to 4.2v, i load = 100ma v out (20mv/div) line transient response time (100 s/div) v in (2v/div) v in = 2.8v to 4.2v, i load = 10ma v out (20mv/div)
RT9055 6 ds9055-00 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. line transient response time (100 s/div) v in (2v/div) v in = 2.8v to 4.2v, i load = 300ma v out (20mv/div) load transient response time (250 s/div) v out1 (50mv/div) v in = 1.8v, i load = 1ma to 100ma i out (100ma/div) load transient response time (250 s/div) v out1 (50mv/div) v in = 1.8v, i load = 1ma to 300ma i out (100ma/div) power on from en time (50 s/div) v en (1v/div) v out1 = v out2 = 1.2v, i out1 = i out2 = 100ma v out1 (1v/div) v out2 (1v/div) v in = 3.6v, v en = 2v power off from en time (50 s/div) v en (1v/div) v out1 = v out2 = 1.2v, i out1 = i out2 = 100ma v out1 (1v/div) v out2 (1v/div) v in = 3.6v, v en = 2v vout1 noise time (5ms/div) v out (100 v/div) v in = v en = 4.5v, i load = 1ma
RT9055 7 ds9055-00 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. psrr -70 -60 -50 -40 -30 -20 -10 0 10 100 1000 10000 100000 1000000 frequency (hz) psrr (db) v out = 1.2v 10 100 1k 10k 100k 1m (hz) psrr vout2 noise time (5ms/div) v out (100 v/div) v in = v en = 4.5v, i load = 1ma
RT9055 8 ds9055-00 march 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. applications information like any low-dropout regulator, the external capacitors used with the RT9055 must be carefully selected for regulator stability and performance. using a capacitor whose value is >1 f on the RT9055 input and the amount of capacitance can be increased without limit. the input capacitor must be located a distance of not more than 0.5 inch from the input pin of the ic and returned to a clean analog ground. any good quality ceramic or tantalum can be used for this capacitor. the capacitor with larger value and lower esr (equivalent series resistance) provides better psrr and line-transient response. the output capacitor must meet both requirements for minimum amount of capacitance and esr in all ldos application. the RT9055 is designed specifically to work with low esr ceramic output capacitor in space-saving and performance consideration. using a ceramic capacitor whose value is at least 1 f with esr is > 20m on the RT9055 output ensures stability. the RT9055 still works well with output capacitor of other types due to the wide stable esr range. figure 1 shows the curves of allowable esr range as a function of load current for various output capacitor values. output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and psrr. the output capacitor should be located not more than 0.5 inch from the vout pin of the RT9055 and returned to a clean analog ground. figure 1. stable c out esr range region of stable c out esr vs. load current 0.001 0.01 0.1 1 10 100 0 50 100 150 200 250 300 load current (ma) region of stable c out esr ( ? ) region of stable c out esr ( ) unstable region stable region simulation verify v in = 5v, c in = c out1 =c out2 =1 f/x7r thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction to ambient thermal resistance. for recommended operating condition specifications, the maximum junction temperature is 125 c. for wl-csp- 6b 0.8x1.2 package, the thermal resistance, ja , is 148 c/ w on a standard jedec 51-7 four-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formula : p d(max) = (125 c ? 25 c) / (148 c/w) = 0.670w for wl-csp-6b 0.8x1.2 package the maximum power dissipation depends on the operating ambient temperature for fixed t j (max) and thermal resistance, ja . the derating curves in figure 2 allow the designer to see the effect of rising ambient temperature on the maximum power dissipation. figure 2. derating curve of maximum power dissipation 0.0 0.2 0.4 0.6 0.8 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) 1 four-layer pcb
RT9055 9 www.richtek.com ds9055-00 march 2012 richtek technology corporation 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. 6b wl-csp 0.8x1.2 package (bsc) outline dimension dimensions in millimeters dimensions in inches symbol min max min max a 0.500 0.600 0.020 0.024 a1 0.170 0.230 0.007 0.009 b 0.240 0.300 0.009 0.012 d 1.150 1.250 0.045 0.049 d1 0.800 0.031 e 0.750 0.850 0.030 0.033 e1 0.400 0.016 e 0.400 0.016
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